The IRPS Reliability Year-in-Review (YiR) session consists of 3 presentations reviewing the past year's reliability work by experts in the field for areas of high interest. It is an excellent augmentation to the tutorial sessions immediately preceding, and attendees may obtain keen reliability insights in a short amount of time.

Speakers

YiR1: Gate-All-Around Devices: Zakariae Chbili, Intel

YiR2: 2D Materials: Baozhen Li, IBM

YiR3: TBD: Mirng-Ji Lii, TSMC

(YiR1) 31st March 3:00 PM - 3:50 PM

Reliability of Gate-All-Around Devices and Impact on Technology Scaling

Zakariae Chbili (Intel)

Abstract: Coming Soon.

Zakariae Chbili received the B.S. degree in electrical engineering from Sidi Mohamed Ben Abdellah University, Fes, Morocco, in 2007, the M.S. degree in electrical engineering from the Institut National des Sciences Appliquées, Toulouse, France, in 2008, and the Ph.D. degree in electrical and computer engineering from George Mason University. He was with the National Institute of Standard and Technology, Gaithersburg, MD, USA as a Guest Researcher from 2010 to 2015 and with GLOBALFOUNDRIES Inc. from 2015 to 2019 where he managed the Northeast Reliability Labs. Zak is currently with Intel Corporation. After managing TD CMOS Reliability for Optane memory, he is now a TD Q&R program manager ensuring successful transition of leading-edge nodes from pathfinding to development and production. His research interests include the reliability of advanced nodes, nanoribbon/GAA reliability, reliability of emerging memory devices, physics of degradation and breakdown in ultrathin gate oxides, and self-heating. Zak is a senior IEEE member and has served in several roles in the reliability community including, General Chairman of IIRW 2019, EDTM 2022 Reliability committee chair, IRPS 2024 Gate and MOL dielectrics committee chair, and is the current EDS device reliability physics committee chair.

(YiR2) 31st March 3:50 PM - 4:40 PM

Potential Roles of 2D Materials in Future Interconnects and Reliability

Baozhen Li (IBM)

Abstract: As technology scales for density and performance, the current Cu interconnect faces severe challenges to meet the requirements for resistance, integration and reliability. Various efforts are being made to extend Cu for future on-chip interconnect. This review will cover the work done to apply 2D materials as barrier layer and capping layers to improve the sharp Cu line/via resistance increase with scaling. Subsequent integration and reliability challenges will also be discussed.

Baozhen Li is a Senior Technical Staff Member in IBM Infrastructure, focusing on reliability and product/technology interactions, working between foundry and chip design and product integration. He has been working on BEOL reliability for more than a quarter of century, serving on technical committees, giving tutorials and invited talks for international reliability and PFA conferences. Baozhen Li holds a Ph.D. degree in Materials Science and Engineering from the University of Notre Dame, USA.

(YiR3) 31st March 4:40 PM - 5:50 PM

Title Coming Soon

Mirng-Ji Lii (TSMC)

Abstract: Coming Soon

Mirng-Li Lii: Biography coming Soon.

IRPS Year-in-Review