Keynote Speakers
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IRPS 2025 Keynote Speakers
Logic Technology Frontiers: Opportunities and Challenges
Dr. Min Cao
Vice President of Pathfinding and Corporate Research, TSMC
Abstract: The semiconductor industry thrives on relentless innovation in materials, processes, devices, advanced packaging, circuit design, computing architecture, and software. These innovations have paved the way for remarkable breakthrough in artificial intelligence (AI), high-performance computing (HPC), wireless connectivity, autonomous driving, the Internet of Things (IoT), and beyond. However, these innovations have also increased system complexity, presenting both new opportunities and challenges. This Keynote will explore the innovative opportunities presented by cutting-edge advancements in logic technology, including novel transistor architectures, new materials, and scaling techniques as well as their implications for the reliability community. Additionally, the keynote will introduce advancements in packaging technologies and their challenges.
Biography: Dr. Min Cao currently serves as Vice President of Corporate Research and Pathfinding at TSMC. Dr. Cao joined TSMC in 2002, and he was appointed Vice President of Pathfinding in 2018. in his over 20 years of services at TSMC, Dr. Cao has contributed to the development of multiple generations of CMOS technologies including N90, N65, N40, N28, N20, and N10, as well as the pathfinding of N5, N3, N2 and A14. Prior to joining TSMC, Dr. Cao worked at Hewlett-Packard Laboratories, PDF Solutions, and Pericom Semiconductor. Dr. Cao received his Ph.D. degree in Physics from Stanford University.
Advancing Moore’s Law with packaging: A disaggregated system perspective
Dr. Choon Lee
SVP, GM of ATTD, Intel Corporation
Biography: coming soon.
Abstract: Since the dawn of AI/ML capabilities, the software industry has pivoted from analyzing massive amounts of data to creating sophisticated models, capable of analysis and artificial intelligence that drives the architecture solutions from both Si and advanced packaging platform. While Moore’s law has continued to yield transistor scaling necessary for these applications, both compute and memory bandwidth have lagged the ever growing demand from models for AI training and inference, an ask that Silicon scaling cannot address on its own. In sharp contrast to the past, the advent of advanced interconnects has resulted in a unique position for packaging. Advanced packaging is driving Moore’s law by leading system performance and definition via disaggregation and reaggregation of chips at an increasingly finer granularity. Such schemes yield impressive results by combining Chips, Chiplets and advanced interconnects in novel architectures that push the system envelope to deliver aggressive compute and memory bandwidths.
We will discuss with examples, the challenges of utilizing packaging elements to their full potential and discuss how co-optimization is crucial to achieving the best results for any given set of system requirements and constraints.
Revolutionizing Power Electronics with Silicon Carbide
Dr Elif Balkas
Chief Technology Officer, Wolfspeed
Biography: As CTO, Elif focuses on pioneering breakthrough semiconductor technology for Wolfspeed’s Power commercial applications. She joined Wolfspeed in 2006 and has more than 20 years of experience in various leadership positions within the wide bandgap materials field. Prior to joining Wolfspeed, Elif served as a scientist at Intrinsic Semiconductor, where she was responsible for GaN and Silicon Carbide epitaxy product development. She has a Ph.D. in materials science from North Carolina State University. In July 2024, Elif was appointed to the US Department of Commerce Industrial Advisory Committee (IAC) for the CHIPS for America program.
Abstract: The power semiconductor industry is driven by the increasing demand for efficient, clean and sustainable energy solutions. The ongoing innovation in semiconductor technology increased the attention on the advanced materials. Among these, silicon carbide (SiC) has emerged as a game-changer providing benefits over traditional silicon-based devices.
This keynote explores the crucial role of SiC technologies in enhancing the efficiency, reliability and performance of power electronics systems. The presentation begins by examining the technology and industry status of SiC, highlighting its contributions to clean energy and sustainability across product, application, and system levels. Furthermore, the keynote reviews the ongoing advancements in materials defects, device reliability and related packaging technologies and their impact on power systems. Concluding the keynote, the future outlook and emerging trends in SiC technology are outlined, underscoring its essential role in driving the evolution of power electronics and contributing to a more sustainable future. Overall, this keynote aims to inspire and inform attendees about the industry’s commitment to utilizing SiC materials and power electronics for a greener and more sustainable world.
Novel Manufacturing Technologies to enable Advanced 3D Architectures
Shankar Venkataraman
Vice President and General Manager, Semiconductor Products Group, Applied Materials, Inc
Biography: Dr. Shankar Venkataraman is Vice President and General Manager in the Semiconductor Products Group. He is responsible for developing and commercializing innovative solutions in the areas of Dielectric Deposition and Epitaxy and growing the company’s total available market.
Previously, Dr. Venkataraman has had responsibilities in both deposition and removal products including the Selective Removal Products portfolio and Gap Fill Dielectric products, where he led the organization in achieving market leadership and identifying new markets.
Dr. Venkataraman received a Ph.D. in materials science and engineering from the University of Minnesota in Minneapolis, MN, and a Bachelor of Technology degree in metallurgical engineering from the Indian Institute of Technology. He holds more than 80 U.S. patents and has published and presented more than 20 papers in refereed journals and at international conferences.
Abstract: coming soon.
Archives
IRPS 2024 Keynote Speakers
Shinichi Takagi, Professor, The University of Tokyo (Japan)
Su Jin Ahn, EVP, Advanced Technology Development Office at Samsung Semiconductor R&D Center, Samsung
Rajeev Malik, Program Director, Systems Development & Deployment, IBM Quantum
Sameer Pendharkar, Vice President of Advanced Technology Development, Texas Instruments
IRPS 2023 Keynote Speakers
Ann Kelleher, EVP and GM of Technology Development, Intel
Gary Hicok SVP, NVIDIA
Mark Fuselier, SVP, Technology & Product Engineering, AMD
Rohit Vidwans, EVP and Chief Engineering & Manufacturing Officer, Ampere
IRPS 2022 Keynote Speakers
Mohsen Alavi, Corporate VP and GM of Quality & Reliability, Intel
Shankar Krishnamoorthy, GM, Digital Design Group, Corporate Staff, Synopsys
Nagasubramaniyan Chandrasekaran, Senior Vice President, Technology Development, Micron
Jun He, VP Corporate Quality & Reliability, TSMC
IRPS 2021 Keynote Speakers
Seok-Hee Lee, President & CEO of SK Hynix
John Palmour, CTO Cree /Wolfspeed
Peter Gammel, CTO MWI at GlobalFoundries
Alessandro Piovaccari, CTO Silicon Labs