Keynote Speakers
Inside Program: Conference Program l Keynote Speakers l Invited speakers l Tutorials
Workshops l Year in Review l Highlighted Papers l Poster Session
IRPS 2022 Keynote Speakers:
Reliability at Scale: Pushing the Boundaries of Reliability and Quality at
the Frontiers of Compute
Mohsen Alavi
Corporate VP and GM of Quality & Reliability, Intel
Abstract: Semiconductor scale is accelerating as the aggregation of very large areas of silicon at the component level amplifies continued Moore’s law scaling to meet the demand for computational capacity. The increasing dependence on these capabilities to support the world’s critical data center infrastructure is also resulting in quality and reliability expectations from hyperscale installations to the ‘edge’ which are far more demanding than those of specialized ‘mission critical’ applications a decade ago. These factors present compelling challenges for semiconductor component and system reliability, namely, the need for lower component failure rates and extremely low data error rates against the backdrop of rapid Si area growth, complex heterogeneous integration, and Si-package technology advances. Addressing reliability at this scale requires characterization and modeling of failure, degradation, and error rate phenomenon to the extremes of variation (single-digit effects / trillion transistors), and requires innovations in fault tolerance, component, and circuit resiliency as well as Si-package process technologies. The future of semiconductor reliability lies in advancing the state of the art in all these disciplines, and providing efficient, holistic solutions from component to system level to meet the needs of the rapidly expanding compute ecosystem.
Silicon Lifecycle Management: Increasing Semiconductor Predictability
in an Unpredictable World
Shankar Krishnamoorthy
GM, Digital Design Group, Corporate Staff, Synopsys
Abstract: A new paradigm of silicon insights is emerging between synergistic embedded sensing technologies and big data lifecycle assessment and analytics. Significant value-driven opportunities lie with new concepts for assessing the reliability and resilience of silicon devices, from data gathered during design, manufacture, test and in-field. Silicon data driven analytics are providing new actionable insights which begin to address the challenges posed to large scale silicon designs of unpredictability due to process variability, mission mode workload variability and long-term silicon aging effects. By increasing our awareness we are able to enhance and better predict reliability, positioning us to eventually determine both the success and fate of deployed silicon-based products.
Transformation of Memory and Storage Hierarchy:
Enabling high performance, reliable, and sustainable
compute applications
Nagasubramaniyan Chandrasekaran
Senior Vice President, Technology Development, Micron
Abstract: We live in a world of data-intensive systems and applications, fueled by the integration of AI tools in our daily routines, driving exponential growth in our memory and storage systems capacity. Our memory and storage hierarchy has developed around existing technology, and while there is still significant room for optimization in this space, we see a greater need to introduce new technologies in the future. To meet the evolving demand for higher performance, lower power, improved reliability and cost, the memory hierarchy is seeing an expansion with new memory solutions. At the same time, we are seeing a convergence of storage and memory applications. Significant opportunities are emerging, for high bandwidth and high-capacity memories to improve the bottleneck and performance limitations of traditional DDR memory systems. On the other end of the hierarchy, storage solutions are evolving into high performance storage space while continuing to drive cost scaling. Such new memory and storage solutions require innovation in materials, device, process, packaging, and systems technology. While we continue to grapple with cost, performance, and reliability optimization challenges, we must also find solutions that enable sustainable manufacturing and products. In this keynote, we will present some of the challenges the industry is facing and opportunities ahead to continue to meet the requirements across the applications landscape.
New Reliability Ecosystem:
Maximize Technology Value to Serve Diverse Markets
Jun He
VP Corporate Quality & Reliability, TSMC
test
test
test
Abstract: In past decades, continuous technology advancement has been accelerating semiconductor evolution to enrich our daily life. Today, advanced logic technologies are the key drivers for Mobile and HPC segments. Incorporating additional specialty technologies (HV, RF, Non-Volatile Memory, MEMS, CIS, etc.) empowers new applications. It also enable further customization of process and designs that is essential to fulfill different product needs. However, the past standardized methodologies with logic based bias and failure criterion fall short of enlarging technology envelope on top of meeting field expectation. Therefore, TSMC has been developing a circuit-based qualification approach offering accurate assessment on reliability lifetime to direct device offering and customizing process for specific product usage. A comprehensive reliability platform covering from design stage to mass production has been deployed for different applications which will be a general practice for future technologies. Along the way, we have been establishing our partnership across IP providers, circuit and system designers as well as reliability communities to have joint development by DFR (design for reliability) and DFT (design for testing). This new ecosystem on reliability incorporated DTCO (Design-Technology Co-optimization) is the next key focus to unleash more innovations and maximize process technology value with fast time-to-market.