IRPS

2018 IRPS Tutorials

Tutorial sessions offer a supreme overview of reliability in semiconductors, circuits, systems unavailable at any other venue at a tremendous value. IRPS conference has a very long history of dedicating two full days to the Tutorials sessions. Since 2011, IRPS conference has offered 129 tutorial 90 minute sessions with an average of over 21 unique sessions per year delivered by industry, academia, and government experts. IRPS tutorial program is designed for the newcomer, the informed, and the expert so whether one is a university student, a field practitioner, or an IEEE fellow, all may gain knowledge in their area or an adjacent one.

March 11th - TimeSunday Track 1 - Silicon Sunday Track 2 - Circuit/System
8:30-10:00amSemiconductor Reliability and Product Qualification,
Chris Henderson, Semitracks
Soft Error Fundamentals,
Norbert Seifert, Intel
10:00-10:30amBreak
10:30-noonFEOL Reliability,

Barry Linder, IBM
Introduction to ESD and Latchup Design and Test Methods,
Nathan Jack, Intel
noon-1:30pmLunch
1:30-3:00pmBack-End of Line (BEOL) Reliability,
Baozhen Li, IBM
Testing of Automotive IC's: Introduction and Advances,
Davide Appello, STMicroelectronics
3:00-3:30pmBreak
3:30-5:00pmAn Overview of Chip to Package Interaction and its Impact on Reliability,
Scott Pozder, GLOBALFOUNDRIES
System Reliability,
Amit Marathe and Amit Kale, Google

March 12th - TimeMonday Track 1 - Advanced CMOSMonday Track 2 - MemoryMonday Track 3 - Power
8:00-9:30amSelf-Heating in 10nm-class FinFET,
Chetan Prasad / Intel
STT-MRAM: Past History, Current Status and Future Perspectives,
Yiming Huai / Avalanche
Ultra High Voltage LDMOS Device and Technology,
Sameer Pendharkar, Texas Instruments
9:30-10:00amBreak
10:00-11:30amAdvanced BTI,

Tibor Grasser, Univ. of TU Wien
3D Flash Memories: Overview of Cell Structures, Operations and Reliability,
Makoto Fujiwara, Toshiba
SiC Power MOSFETs: Application Benefits and Technology Validations Needs,
Albert Castellazzi, Nottingham University
11:30-13:00pmLunch
13:00-2:30pmConductive Atomic Force Microscopy and its Use in Nanoelectronic Device Reliability,
Mario Lanza, SUDA
HBM Design, Test & Reliability Challenges for AI Applications,
Daeyong Shim, SKHynix
Validating the Robustness of GaN Power Transistors,
Kenichiro Tanaka, Panasonic
2:30-3:00pmBreak
3:00-5:00pmYear In Review