2018 IRPS Technical Program
Download the pdf of the program
Overview of Symposium
(Click the image to download a larger version of the Program overview)
IRPS 2018 Technical Program Highlights
IRPS 2018 has a very strong technical program of 39 invited speakers, 76 platform presentations, and 59 posters. This year there are three focus areas, wide bandgap, 3D and advanced packaging, and systems reliability. These complement our traditionally strong topic areas of transistors, dielectrics, memory, product, circuits, soft error, ESD, metallization, process integration, failure analysis and photovoltaic reliability, along with the second year of a well-received reliability testing session.
Focus 1: session on Wide Bandgap Semiconductors
Session Chairs: Sandeep Bahl, TI and Matteo Meneghini, University of Padova
We have worked very hard to make the 2018 IRPS Wide bandgap (WBG) semiconductor program the best ever. There are two GaN sessions, one SiC session, one focus session, and two workshop sessions. In addition, there is a poster session, a tutorial, and a WBG Year-in-review report out. For the focus session, a conference first, five key speakers have been invited to bring together the GaN and SiC communities around topics of mutual interest e.g. reliability synergies and standardization. The session features a historical talk from a speaker involved with the development of traditional qualification methodology, two talks from speakers involved with WBG standards development, and two talks on topics of WBG interest. The workshop sessions continue the reliability and synergy discussion in a less formal setting. The two GaN sessions focus on reliability aspects of GaN-based devices for high voltage applications. The first one is around conventional reliability topics and failure mechanisms, including a key invited speaker from industry on issues facing commercialization. The second one is around dynamic reliability, including short-circuit robustness, switching lifetime extrapolation, and safe operating area. For the SiC session, four key speakers have been invited on topics from defects to the effects of terrestrial radiation and gate oxide reliability. A worldwide effort is underway to develop standards for wide bandgap devices. As many of you know, IRPS is the conference where reliability physics started and resulted in the qualification procedures we use. Our goal is to make IRPS the annual hub for WBG reliability and re-create the excitement so that you can be a part of future WBG history.
Focus 2: session on System Reliability
Session Chairs: Guneet Sethi, Amazon Lab 126 and Rob Kwasnick, Intel
The System Reliability session has eight presentations, four of which are invited. System Reliability covers a wide range of topics, many of which are represented. The first talk explains a method for IC power minimization in test accounting not only for the IC, but also for the system. An invited talk follows about methods for enabling commercial parts to be used for space applications where very low failure is required. This is followed by a talk about machine learning methods to evaluate remaining product life in the field, and an invited talk about architectural methods to achieve high RAS CPU as the exascale era approaches. The next talk is another invited paper about the relationship of quality to reliability for avionics, another use case where low failure rate is necessary. After a break, the session continues with a presentation about machine learning methods to predict remaining useful life of solid state drives, and then a study of the reliability of OLED displays on flexible substrates. The session ends with an invited talk about the use of self-calibration to improve the reliability of MEMS sensors. Overall, the session provides reliability practitioners with a broad view of state-of-the-art system reliability topics.
Focus 3: session on 3D/2.5D Packaging
Session Chairs: Kothandaraman Chandrasekara, IBM and Sudarshan Rangaraj, Amazon Lab 126
While traditional transistor scaling has saturated, rapid advances in 3D-integration and wafer-level packaging have led to improvements in system performance and functionality. IRPS 2018 will feature two sessions dedicated to this rapidly advancing field. The focus session will feature prominent researchers in this field, drawn from academia as well as internationally renowned research institutions. These researchers will present their ground-breaking work on wafer level packaging technologies, intra-chip and inter-chip interconnections using directed self-assembly (DSA) and hybrid bonding technologies. Overviews of these novel technologies will be presented and reliability challenges posed by their approaches will be highlighted. The technical session will focus on detailed reliability studies on SRAM stability under mechanical stress, TSV induced device perturbations and electromigration effects in ball grid arrays. In addition, researchers from Intel and Global foundries will present their overviews on reliability challenges in 2.5D and 3D integration technologies.
This will be the second year for the Reliability Testing session at IRPS. This track will focus on novel reliability testing techniques, methods of analysis and the test equipment used to design and perform modern reliability tests. Platform presentations will include topics ranging from an innovative lateral profiling technique used to give insight into the trap distribution along the channel to the impact of nanosecond-level measurements on self-heating effects on the characterization of HCI and BTI. The practical aspects of testing will be explored along with the underlying physics of reliability.
The Transistor session is divided into two tracks. The first session focusses on the physics, models and characterization of Silicon devices, with special attention to BTI and related traps. The second track captures “Beyond CMOS” devices with focus on non-silicon materials such as SiGe, InGaAs, and Transition Metal Dichalcogenides. One of the important session highlights is an invited talk which will summarize the status of the community’s understanding of BTI aging, with details from the main competing physical theories. Additionally, key new discoveries will be presented in the session on the physics of trap behavior in new materials, and novel characterization techniques to account for self-heating in aging evaluations.
In this year’s IRPS, we have two dedicated full sessions addressing interesting and critical issues pertaining to Dielectric breakdown and reliability issues at the front-end, middle-end-of-line and back-end-of-line circuits. Of the 10 papers to be presented in these two sessions combined, 5 each are from industry and academia. Authors from the University of Modena, Italy will be presenting their latest work on the role of “defect clustering” in hafnium oxide and its significant impact on the statistics of TDDB and the Weibull Slope scaling relationship with oxide thickness from a simulation standpoint. Their results, if experimentally proven, may have a big impact on the methodologies and approaches currently being used for TDDB lifetime prediction at the front-end. Another work from a BEOL group at IMEC performed in-depth study of metal drift in dielectrics with a focus on the physics of filament nucleation and growth. They make a clear attempt to decouple the role of metal drift from intrinsic breakdown and their paper shows that TDDB for a wide range of voltage and temperature ranges needs to be assessed in order to make reliable predictions. The group from IBM presents another interesting paper that introduces the concept of “elapsed-time” statistical distributions in BEOL devices and provides large scale test data evidence to prove that they are fundamentally non-Weibull, and are strongly influenced by thickness non-uniformity as well as line-edge roughness. Apart from the traditional dielectrics being studied, authors from the Singapore University of Technology and Design (SUTD) present a new study on the soft and hard breakdown mechanisms in ultra-thin hexagonal boron nitride films, which serves as a potential candidate for 2-D dielectrics for flexible electronics applications in the future. This session is truly inter-disciplinary and as has been the trend over the past couple of years, with scientists from FEOL, MOL and BEOL presenting their work together in the same forum, interesting discussions and debates are expected.
The Process Integration session mainly focuses on the FEOL reliability of advanced CMOS nodes. 2 platform papers address reliability challenges in 10nm & 7nm FinFET technologies introducing new major process and device architecture features. Other studies provide a better understanding of the role played by channel and gate materials and by BEOL anneals on the transistor reliability. They also explain how to optimize process knobs to improve performance and reliability simultaneously. Finally a new simulation framework is developed for an accurate evaluation of Self-Heating in ultra-scaled technologies.
The Memory sessions will span a large variety of memory technologies, including floating-gate, ferroelectric, phase-change and STT. Works with either an emphasis on characterization techniques or reliability evaluation will be presented, such as a new technique for monitoring lateral charge migration in charge-trap Flash or endurance studies and improvement in ferroelectric-based memories. Moreover, the optimization of the metallic liner as well as the benefits of a carbon electrode in OTS selectors will be discussed. Finally, bipolar TDDB in MgO STT-MRAM will be discussed, highlighting the role of self-heating effects.
This year’s Circuit Reliability/Aging session comprises 2 invited papers and 4 regular papers. Prof. Mingoo Seok will kick off the session with an invited paper on circuit based in-situ aging monitoring and compensation techniques. The following two papers present extensive aging data from an all-digital phase-locked-loop and a low-voltage high-speed IO transmitter circuit, respectively. Prof. Shimeng Yu will present an invited paper on reliability implications on resistive memory based neuromorphic systems. Next, a paper discussing the interplay between dielectric breakdown and bias temperature instability will be presented. Finally, process and aging compensation approaches utilizing on-chip critical path monitors will be discussed.
The Product Reliability session includes a wide range of papers tying reliability physics to the product level. The Product session includes a novel product level temperature and aging compensation scheme proposal, with a focus on how it can meet the demanding reliability needs of the automotive segment. In addition the session will cover reliability characterization of CMOS Image Sensors and advanced product level aging characterization techniques.
At the 2018 IRPS, there will be two sessions devoted to ESD and Latch-up. Both sessions will take place on Tuesday, March 13th: one in the morning and one in the afternoon. Morning session will focus on system level ESD and latch-up. It will feature an invited talk on system level ESD and its implications on I/O protection as well as the paper describing stochastic modeling of air electrostatic discharge. There will also be a paper introducing an injector-victim current transfer model for latch-up design rule optimization. Another invited paper in this session will talk about latch-up challenges in advanced FinFET technologies. The afternoon session will continue focusing on ESD and latch-up challenges in advanced technologies and novel materials. It will feature three papers involving graphene FETs, a-Si:H based thin-film transistors and bulk FinFETs.
The Photovoltaic session will cover a broad area of topics influencing the reliability of photovoltaic systems, from novel analytical methods for cells (low-frequency noise spectroscopy for silicon, organic and perovskite cells) and passivation layers (scanning nonlinear dielectric microscopy) to modified transformerless dual buck inverters with improved lifetime. Also news on the module part of the photovoltaic value chain will be covered with contributions regarding performance improvements of tandem amorphous / microcrystalline Si photovoltaic modules and the investigation of mechanical and chemical adhesion at the encapsulant interfaces during the lamination process of modules as well as of permanent shunting effects from passing shadows causing reverse-bias damage in thin-film photovoltaic modules.
In the Soft Error session, innovative findings on the threat of radiation-induced soft errors in advanced electronic devices and its impact at the system level will be presented. A range of important topics in the area of soft errors will be covered. The main session highlights include: the soft error response and modeling of ultra-scaled FinFET SRAMs (down to 7-nm node) and the comparison with planar technologies, the physical mechanism and modeling of peculiar line-type multi-cell upsets in thin BOX SOI SRAMs, and the impact at the system-level of soft errors in complex devices such as a gigabit Ethernet transceivers.
In the Failure Analysis session there will be a breadth of papers covering fault isolation, failure analysis, and characterization of reliability defects. An innovative frequency mapping approach and advanced design for test (DFT) are leveraged during fault isolation to identify a defect on a 10nm technology node product despite poor initial scan diagnosis. Defect localization for non-volatile memory with resistance fails is also described where the defect is found despite the very long length of the word line. Improved methods for defect characterization are of heightened interest to the failure analysis community and the session includes both the latest on high resolution cathodoluminescence microscopy as well as a new technique for device temperature measurement using spontaneous near infrared (NIR) emission from an IC.
The Metallization reliability session will cover topics such as new materials for next generation metallization schemes, novel test structure design and analysis, and electromigration in realistic interconnect layouts. Current findings relating to Cu(Mn) and metallization microstructure will be discussed. The conference will also feature papers on understanding and modeling the effects of self-heating and heat dissipation on the reliability of BEOL.