IRPS

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Technical Presentations 
Beyond CMOS Devices
Session Chair Introduction: Charlie Slayman
6C.6 - First Insights into Electro-Thermal Stress Driven Time-Dependent Permanent Degradation & Failure of CVD Monolayer MoS2 ChannelAnsh ., Indian Institute of Science, India
P14 (Poster) - Physical Insights into Phosphorene Transistor Degradation Under Exposure to Atmospheric Conditions and Electrical StressJeevesh Kumar, Indian Institute of Science, India
P15 (Poster) - Impact of Extrinsic Variation Sources on the Device-to-Device Variation in Ferroelectric FETKai Ni, Rochester Institute of Technology, United States
Circuit Reliability and Aging
Session Chair Introduction: James Tschanz
2A.1 (Invited) - An Industry-Standard Approach Toward Modeling Device AgingColin Shaw, Silvaco, United States
3A.1 (Invited) - A Novel Approach to In-field, In-mission Reliability Monitoring Based on Deep DataEvelyn Landman, CTO, ProteanTecs, United States
3A.2 (Invited) - Voltage Regulator ReliabilitySaibal Mukhopadhyay, Georgia Tech, United States
3A.3 (Invited) - Experimental Monitoring of Aging in CMOS RF Linear Power Amplifiers: Correlation Between Device and Circuit DegradationRosana Rodriguez, Universitat Autonoma de Barcelona, Spain
2A.2 - Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS)Subrat Mishra, IMEC, Belgium
2A.3 - BTI and HCD Degradation in a Complete 32 x 64 bit SRAM Array – including Sense Amplifiers and Write Drivers – under Processor ActivityVictor M. van Santen, Karlsruhe Institute of Technology (KIT), Germany
3A.4 - Hot-Carrier induced Breakdown events from Off to On mode in NEDMOSAlain Bravaix, ISEN, France
P1 (Poster) - Analysis of Hot Carrier Degradation in Cryo-CMOSWriddhi Chakraborty, University of Notredame, United States
P2 (Poster) - Inverse Design of FinFET SRAM CellsRui Zhang, Georgia Institute of Technology, United States
P3 (Poster) - Degradation Detection of Power Switches in a Three Phase Inverter using SSTDR Signal Embedded PWM SequenceRoy Sourov, University of Missouri - Kansas City, United States
P4 (Poster) – Novel Re-Configurable Circuits for Aging Characterization: Connecting Devices to CircuitsKetul Sutaria, Intel Corporation, United States
ESD and Latchup
Session Chair Introduction: Shin-Hung Chen
6A.1 - How to Achieve Moving Current Filament in High Voltage LDMOS Devices: Physical Insights & Design Guidelines for Self-Protected ConceptsKranthi Nagothu, Indian Institute of Science, India
6A.2 - Over-Voltage Protection on the CC Pin of USB Type-C Interface against Electrical Overstress EventsMing-Dou Ker, Institute of Electronics, National Chiao-Tung University, Taiwan
6A.3 - Design Insights to Address Low Current ESD Failure and Power Scalability Issues in High Voltage LDMOS-SCR DevicesKranthi Nagothu, Indian Institute of Science, India
6A.4 - Threshold Voltage Shift in a-Si:H Thin film Transistors under ESD stress ConditionsRajat Sinha, Indian Institute of Science, India
6A.5 - Sub-nanosecond Reverse Recovery Measurement for ESD DevicesAlex Ayling, University of Illinois - Urbana Champaign, United States
6A.6 - Improved Turn-on Uniformity & Failure Current Density by n- & p-Tap Engineering in Fin Based SCRsMonishmurali M, Department of Electronic Systems Engineering, India
P85 (Poster) - Design Optimization of MV-NMOS for ESD Self-protection in 28nm CMOS technologyKyongjin Hwang, GLOBALFOUNDRIES, Singapore
P86 (Poster) - Triggering Optimization on NAND ESD Clamp and Its ESD Protection IO Scheme for CMOS DesignsJian Liu, Qorvo Inc., United States
P87 (Poster) - A Method to Analyze Aging Effect on ESD Protection DesignKuo-Hsuan Meng, NXP Semiconductors, United States
P88 (Poster) - Understanding ESD Induced Thermal Mechanism in FinFETs Through Predictive TCAD SimulationZhiqing Li, GLOBALFOUNDRIES, United States
Failure Analysis
Session Chair Introduction: Jane Li
7C.4 (Invited) - At-Speed Defect Localization by Combining Laser Scanning Microscopy and Power Spectrum AnalysisEdward Cole, Sandia, United States
7C.1 - STEM EBIC for High-Resolution Electronic CharacterizationWilliam Hubbard, The Aerospace Corporation, United States
7C.2 - High-Current State triggered by Operating-Frequency ChangeLyuan Xu, vanderbilt, United States
P5 (Poster) - Evolution of Defect in AlGaN-based Deep Ultraviolet Light Emitting Diodes During Electrical StressYingzhe Wang, Xidian University, China
Gate/MOL Dielectrics
Session Chair Introduction: Mario Lanza
8A.1 - The Mysterious Bipolar Bias Temperature Stress from the Perspective of Gate-Sided Hydrogen ReleaseTibor Grasser, Institute for Microelectronics, TU Wien, Austria
8A.2 - Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line InterconnectsKristof Croes, IMEC, Belgium
8A.3 - Generation of Hot-Carrier Induced Border and Interface Traps, Investigated by Spectroscopic Carge PumpingBernhard Ruch, KAI Kompetenzzentrum Automobil- und Industrieelektronik GmbH, Austria
8A.4 - Reliability and Breakdown Study of Erase Gate Oxide in Split-Gate Non-Volatile Memory DeviceShubhakar Kalya, Singapore University of Technology and Design, Singapore
8A.5 - Correlation of Dielectric Breakdown and Nanoscale Adhesion in SiO2 Thin FilmsAlok Ranjan, Singapore University of Technology and Design, Singapore
P6 (Poster) - Impact of Intrinsic Series Resistance on the Reversible Dielectric Breakdown Kinetics in HfO2 MemristorsMireia Bargallo-Gonzalez, Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Spain
P7 (Poster) - Reversible dielectric breakdown in h-BN stacks: a statistical study of the switching voltagesMario Lanza, Soochow University, China
P8 (Poster) - Influence of the magnetic field on dielectric breakdown in memristors based on h-BN stacksMario Lanza, Soochow University, China
P9 (Poster) - Two-Regime Drift in Electrolytically Gated FETs and BioFETsSybren Santermans, IMEC, Belgium
IC Product Reliability
Session Chair Introduction: Jae-Gyung Ahn
7B.1 - Estimation of Product Reliability using TDDB Simulation and Statistical EM MethodJae-Gyung Ahn, Xilinx, Inc., United States
7B.2 - Thermal Characterization and TCAD Modeling of a Power Amplifier in 45RFSOI for 5G mmWave ApplicationsByoung Min, GLOBALFOUNDRIES, United States
7B.3 - Impact of X-Ray Radiation on the Reliability of Logic Integrated CircuitsSomayyeh Rahimi, NVIDIA Corp., United States
9D.1 - Comprehensive Quality and Reliability Management for Automotive ProductM. H. Hsieh, Mediatek.inc, Taiwan
9D.2 - Advanced methods for CPU product reliability modeling and enhancementOren Zonensain, Intel Corporation, Israel
9D.3 - A Reliability Overview of Intel’s 10+ Logic TechnologyRohit Grover, Intel Corporation, United States
P11 (Poster) - No Trouble Found (NTF) Customer Return AnalysisThong Tran, Cypress Semiconductor, United States
P12 (Poster) - High Frequency TDDB of Reinforced Isolation Dielectric SystemsTom Bonifield, Texas Instruments, Inc., United States
P13 (Poster) - Dynamic vs Static Burn-in for 16nm ProductionJeffrey Zhang, Xilinx Inc., United States
Memory Reliability
Session Chair Introduction: Ming-Yi Lee
7A.1 - Origins and Signatures of Tail Bit Failures in Ultrathin MgO Based STT-MRAMJia Hao Lim, GLOBALFOUNDRIES, Singapore
7A.2 - Magnetic Immunity Guideline for Embedded MRAM Reliability to Realize Mass ProductionJia Hao Lim, GLOBALFOUNDRIES, Singapore
7A.3 - Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJsSimon Van Beek, IMEC, Belgium
7A.4 - Impact of Ferroelectric Wakeup on Reliability of Laminate based Si-doped Hafnium Oxide (HSO) FeFET Memory CellsTarek Ali, Fraunhofer IPMS-Center Nanoelectronic Technologies (CNT), Germany
9B.1 - eNVM RRAM reliability performance and modeling in 22FFL FinFET technologyYao-Feng Chang, Intel Corporation, United States
9B.2 - Modeling of Charge Failure Mechanisms during the Short Term Retention Depending on Program/Erase Cycle Counts in 3-D NAND Flash MemoriesChangbeom Woo, Seoul National University, Republic of Korea
9B.3 - Write Disturb Mechanism in Embedded SuperFlash TechnologyClyde Dunn, Texas Instruments, United States
9B.4 - Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine IncorporationHarumi Seki, Kioxia Corporation, Japan
P16 (Poster) - Temperature Dependence and Temperature-Aware Sensing in Ferroelectric FETKai Ni, Rochester Institute of Technology, United States
P17 (Poster) - A Pulsed RTN Transient Measurement Technique: Demonstration on the understanding of the Switching in Resistance memorySteve Chung, Institute of Electronics, National Chiao Tung University, Taiwan
P18 (Poster) - Reliability Analysis by Charge Migration of 3D SONOS Flash MemoryJun Kyo Jeong, Chungnam National University, Republic of Korea
P19 (Poster) - Reliability of Industrial grade Embedded-STT-MRAMYongsung Ji, SAMSUNG ELECTRONICS, Republic of Korea
P21 (Poster) - Double Layers Omega FETs with Ferroelectric HfZrO2 for One-Transistor MemoryMin-Hung Lee, National Taiwan Normal University, Taiwan
P22 (Poster) - Statistical Analysis of Bit-Errors Distribution for Reliability of 3-D NAND Flash MemoriesMing-Yi Lee, Macronix International Co. Ltd., Taiwan
P24 (Poster) - ON-state retention of Atom Switch eNVM for IoT/AI Inference SolutionKoichiro Okamoto, NEC, Japan
P25 (Poster) - Open Block Characterization and Read Voltage Calibration of 3D QLC NAND FlashNikolaos Papandreou, IBM Research, Switzerland
Metallization/BEOL Reliability
Session Chair Introduction: Baozhen Li
4A.1 - Reliability Characteristics of a High Density Metal-Insulator-Metal Capacitor on Intel’s 10+ ProcessCheyun Lin, Intel Corporation, United States
4A.2 - Impact of Anode-side Defect Generation on Inter-Level TDDB Degradation in Cu/Low-k Damascene StructuresNaohito Suzumura, Renesas Electronics Corporation, Japan
4A.3 - Dielectric Reliability Study of 21 nm Pitch Interconnects with Barrierless Ru FillAlicja Lesniewska, IMEC, Belgium
9C.1 - Reliability on EUV Interconnect Technology for 7 nm and beyondTae-Young Jeong, SAMSUNG ELECTRONICS, Republic of Korea
9C.2 - Metal reliability mechanisms in Ruthenium interconnectsOlalla Varela Pedreira, IMEC,Belgium
9C.3 - Reliability of Metal-Dielectric Structures Under Intermittent Current PulsingChung-Shuo Lee, Purdue University, United States
P26 (Poster) - Stress Induced Voiding Behavior of Electroplated Copper Thin Films in Highly Scaled Cu/low-k interconnectsClement Huang, Reliability Technology & Assurance Division, UMC Inc., Taiwan
P27 (Poster) - Physics based modeling of bimodal electromigration failure distributions and variation analysis for VLSI interconnectsSarath Mohanachandran Nair, Karlsruhe Institute of Technology (KIT), Germany
P28 (Poster) - BEoL Reliability, XPS and REELS Study on low-k Dielectrics to understand Breakdown MechanismsBettina Wehring, Fraunhofer IPMS Center Nanoelectronic Technologies (CNT), Germany
Neuromorphic Computing Reliability
Session Chair Introduction: Matt Marinella
3C.1 (Invited) - Introduction of Non-Volatile Computing In Memory (nvCIM) by 3D NAND Flash for Inference Accelerator of Deep Neural Network (DNN) and the Read Disturb Reliability EvaluationHang-Ting Lue, Macronix, Taiwan
8B.1 (Invited) - Embracing the Unreliability of Memory Devices for Neuromorphic ComputingDamien Querlioz, Université Paris-Saclay, CNRS, France
8B.5 (Invited) - Neuromorphic Computing with Phase Change, Device Reliability, and Variability ChallengesCharles Mackin, IBM Research, United States
3C.2 - Device-aware inference operations in SONOS non-volatile memory arraysChristopher Bennett, Sandia National Labs, United States
3C.3 - Superior Data Retention of Programmable Linear RAM (PLRAM) for Compute-in-Memory ApplicationShifan Gao, Zhejiang University, China
3C.4 - Gate-Oxide Trapping Enabled Synaptic Logic TransistorsXin Ju, Nanyang Technological University, Singapore
3C.5 - Memory Update Characteristics of Carbon Nanotube Memristors (NRAM) Under Circuitry-relevant Operation ConditionsDmitry Veksler, The Aerospace Corporation, United States
8B.2 - Impact of Read Disturb on Multilevel RRAM based Inference Engine: Experiments and Model PredictionWONBO SHIM, Georgia Tech, United States
8B.3 - Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph NoiseTommaso Zanotti, University of Modena and Reggio Emilia, Italy
8B.4 - Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement LearningMarina Yamaguchi, Kioxia Corporation, Japan
P29 (Poster) - Reliability Characterization of Logic-Compatible NAND Flash Memory based Synapses with 3-bit per Cell Weights and 1uA Current StepsMinsu Kim, University of Minnesota, United States
P30 (Poster) - Reliability Aspects of SONOS Based Analog Memory for Neuromorphic ComputingKrishnaswamy Ramkumar, Cypress Semiconductor, United States
P31 (Poster) - Radiation Tolerance of 3-D NAND Flash Based Neuromorphic Computing SystemBiswajit Ray, The University of Alabama in Huntsville, United States
Packaging and 2.5/3D Assembly
Session Chair Introduction: Rohit Grover
8D.1 - Silicon Reliability Characterization of Intel’s Foveros 3D Integration Technology for Logic-on-Logic Die StackingChetan Prasad, Logic Technology Development Quality and Reliability, Intel Corporation, United States
8D.3 - Effects of UBM Thickness and Current Flow Configuration on Electromigration Failure Mechanisms in Solder InterconnectsYi Ram Kim, University of Texas at Arlington, United States
8D.4 - Efficient Bidirectional protection structure for Plasma induced damage (PID) and Electrostatic discharge (ESD) for 3D IC IntegrationCS (Prem) Premachandran, GLOBALFOUNDRIES, United States
P32 (Poster) - Effects of Wiring Density and Pillar Structure on Chip Package Interaction for Advanced Cu Low-k ChipsWeishen Chu, The University of Texas at Austin, United States
P33 (Poster) - Effect of Residual TiN on Reliability of Au Wire Bonds during High Temperature StorageJohn McGlone, ON Semiconductor, United States
P34 (Poster) - Backside Die-Edge and Underfill Fillet Cracks Induced by Additional Tensile Stress from Increasing Die-to-Package Ratio in Bare-Die FCBGAKhai Nguyen, NVIDIA Corp., United States
Process Integration
Session Chair Introduction: Mustapha Rafik
6C.1 - Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Circuit and an Effective Layout SolutionChieh Lo, Macronix Emerging Central Lab., Macronix International Co., Ltd., Taiwan
6C.2 - Relevance of fin dimensions and high-pressure anneals on hot-carrier degradationAdrian Chasin, IMEC, Belgium
6C.3 - A new technique for evaluating stacked nanosheet inner spacer TDDB reliabilityTian Shen, IBM Research, United States
6C.4 - Trap Density Modulation for IO FinFET NBTI ImprovementRakesh Ranjan, Samsung Austin Semiconductor, LLC, United States
6C.5 - A New Implementation Approach for Reliability Design Rules against Plasma Induced Charging Damage from Well Configurations of Complex ICsAndreas Martin, Infineon Technologies AG, Germany
P36 (Poster) - Study of Lower Voltage Protection against Plasma Process Induced Damage by Quantitative Prediction TechniqueYohei Hiura, Sony Semiconductor Solutions Corporation, Japan
P37 (Poster) - Reliability Characterization for 12V Application Using the 22FFL FinFET TechnologyChen-Yi Su, Intel Corporation, United States
P38 (Poster) - Facile Route for Low-temperature Eco-friendly Solution Processed ZnSnO Thin-film TransistorsTianshi Zhao, Xi’an Jiaotong-Liverpool University, China
Reliability Testing
Session Chair Introduction: Jifa Hao
2C.1 - A Novel ‘I-V Spectroscopy’ Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS TransistorsYen-Pu Chen, Purdue University, United States
2C.2 - Studies of Bias Temperature Instabilities in 4H-SiC DMOSFETsAmartya Ghosh, The Pennsylvania State University, United States
2C.3 - Surge Energy Robustness of GaN Gate Injection TransistorsRuizhe Zhang, Virginia Polytechnic Institute and State University, United States
5C.1 - In-Situ Monitoring of Self-Heating Effect and Its Quantitative Impact on Hot Carrier Injection in Aggressively Scaled SOI FinFETs Under Dynamic Circuit OperationYiming Qu, Zhejiang University, China
5C.2 - A fast and test-proven methodology of assessing RTN/fluctuation on deeply scaled nano pMOSFETsRui Gao, China Electronic Product Reliability and Environment Research Institute, China
5C.3 - Reliability and Variability of Advanced CMOS Devices at Cryogenic TemperaturesAlexander Grill, IMEC, Belgium
5C.4 - Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic TemperaturesJakob Michl, Institute for Microelectronics, TU Wien, Austria
5C.5 - Nanoindentation to investigate IC stability using ring oscillator circuits as a CPI sensorSimon Schlipf, Fraunhofer Institute for Ceramic Technologies and Systems IKTS, Germany
P41 (Poster) - A test method for MOSFET Voltage derating design verification in switching power supply circuitWei Li, China CEPREI Laboratory, China
P43 (Poster) - Reliability Stressing Control Using Jacobian Feedback Kelvin Measurement on Intel TechnologiesPeng Xiao, Intel Corporation, United States
P44 (Poster) - Hybrid HCI Degradation in Sub-micron NMOSFET due to Mixed Back-end Process DamagesKuilong Yu, Yangtze Memory Technologies Co., Ltd., China
RF/mmW/5G Reliability
Session Chair Introduction: Farid Medjdoub
2B.1 (Invited) - Reliability Physics of GaN HEMT Microwave Devices: The Age of ScalingEnrico Zanoni, UniPD, Italy
2B.3 (Invited) - Silicon Based RF Reliability Challenges for 5G CommunicationPaul Colestock, GLOBALFOUNDRIES, United States
4B.3 (Invited) - The Role of RF Operational Life Testing in Evaluating III-V Devices Addressing RF Through Millimeter-wave ApplicationsElias Reese, Qorvo, United States
2B.2 - Short-term reliability of high performance Q-band AlN/GaN HEMTsRiad Kabouche, IEMN-University of Lille, France
4B.1 - A Novel Methodology to Evaluate RF Reliability on SOI CMOS-based Power Amplifier for mmWave ApplicationsSrinivasan Purushothaman, GLOBALFOUNDRIES, United States
4B.2 - Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applicationsVamsi Putcha, IMEC, Belgium
Soft Error
Session Chair Introduction: Indranil Chatterjee
8C.1 - Investigating of SER in 28 nm FDSOI-Planar Technology and Comparing with SER in Bulk-FinFET TechnologyTaiki Uemura, SAMSUNG ELECTRONICS, Republic of Korea
8C.2 - Thermal Neutron Induced Soft Errors in 7-nm Bulk FinFET NodeLyuan Xu, Vanderbilt University, United States
8C.3 - Backside Alpha-Irradiation Test in Flip-Chip Package in EUV 7 nm FinFET SRAMTaiki Uemura, SAMSUNG ELECTRONICS, Republic of Korea
8C.4 - On the Correlation of Laser-induced and High-Energy Proton Beam-induced Single Event LatchupRicardo Ascazubi, Intel Corporation, United States
8C.5 - Impact of Hydrided and Non-Hydrided Materials Near Transisotrs on Neutron-Induced Single Event UpsetsShinichiro Abe, Japan Atomic Energy Agency, Japan
P45 (Poster) - Impact of Radiation on Negative Capacitance FinFETHussam Amrouch, Karlsruhe Institute of Technology, Germany
P46 (Poster) - Large-tilt Heavy Ions Induced SEU in Multiple Radiation Hardened 22 nm FDSOI SRAMsChang Cai, Institute of Modern Physics, Chinese Academy of Sciences, China
P47 (Poster) - Temperature Dependence of Single Event Transient Pulse Widths for 7-nm Bulk FinFET TechnologyJingchen Cao, Vanderbilt University, United States
P48 (Poster) - Using Partial Duplication With Compare to Detect Radiation-Induced Failure in a Commercial FPGA-Based Networking SystemJared Anderson, Brigham Young University, United States
P49 (Poster) - Characterizing Energetic Dependence of Low-Energy Neutron-induced MCUs in 65 nm bulk SRAMsWang LIAO, Kochi University of Technology, Japan
P50 (Poster) - Comparing Variation-tolerance and SEU/TID-Resileince of Three SRAM Cells in 28nm FD-SOI Technology: 6T, Quatro, and we-QuatroDinh Trinh Linh, Kyunghee Univeristy, Republic of Korea
System Electronics Reliability
Session Chair Introduction: Jay Sarkar
4C.1 (Invited) - Challenges in Prognostics and Health Management of Electronic SystemsMichael Azarian, Univ Maryland/CALCE, United States
4C.2 - Use of Silicon-based Sensors for System Reliability PredictionDmitry Goloubev, Cisco Systems, Belgium
4C.3 - Early Diagnosis and Prediction of Wafer Quality using Machine Learning on sub-10nm Logic TechnologyHai Jiang, SAMSUNG ELECTRONICS, Republic of Korea
P52 (Poster) - An Interpretable Predictive Model for Early Detection of Hardware FailureArtsiom Balakir, University of Illinois - Urbana Champaign, United States
P51 (Poster) - Trends and Functional Safety Certification Strategies for Advanced Railway Automation SystemsJyotika Athavale, Intel Corporation, United States
Transistors I
Session Chair Introduction: Jacopo Franco
5A.1 (Invited) - Modeling Framework for Transistor Aging Playback in Advanced Technology NodesInanc Meric, Intel Corporation, United States
5A.2 - A Compact Physics Analytical Model for Hot-Carrier DegradationStanislav Tyaginov, IMEC, Belgium
5A.3 - The Influence of Gate Bias on the Anneal of Hot-Carrier DegradationMichiel Vandemaele, IMEC + KU Leuven, Belgium
5A.4 - Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETsNilotpal Choudhury, Indian Institute of Technology Bombay, India
5A.5 - Comparison of Variability of HCI Induced Drift for SiON and HKMG DevicesXavier Federspiel, ST Microelectronics, France
9A.1 - Advanced self-heating model and methodology for layout proximity effect in FinFET technologyHai Jiang, Samsung Electronics, Republic of Korea
9A.2 - Effect of Drain-to-Source Voltage on Random Telegraph Noise Based on Statistical Analysis of MOSFETs with Various Gate ShapesRyo Akimoto, Tohoku University, Japan
9A.3 - On the impact of mechanical stress on gate oxide trappingAnastasiia Kruv, IMEC, Belgium
9A.4 - NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet TransistorHuimei Zhou, IBM Research, United States
Transistors II
P53 (Poster) - A Novel HCI Reliability Model for RF/mmWave Applications in FDSOI TechnologyWafa Arfaoui, Germany
P54 (Poster) - Anomalous accelerated negative-bias- instability (NBI) at low drain biasCharles Cheung, NIST, United States
P55 (Poster) - Analysis of The Hole Trapping Detrapping Component of NBTI Over Extended Temperature RangeNilotpal Choudhury, Indian Institute of Technology Bombay, India
P56 (Poster) - Effect of Different Ambients on the Recovery of Hot-Carrier Degraded DevicesMaurits de Jong, University of Twente, Netherlands
P57 (Poster) - “shift and match” (s&m) method for channel mobility correction in degraded mosfetsRui Gao, China Electronic Product Reliability and Environment Research Institute, China
P58 (Poster) - Self-healing LDMOSFET for high-voltage application on high-k/metal gate CMOS processJing-Chyi Liao, Mediatek, Taiwan
P59 (Poster) - AC stress reliability study of a new high voltage transistor for logic memory circuitsJordan Locati, STMicroelectronics, France
P60 (Poster) - Analysis of charge-to-hot-carrier degradation in Ge pFinFETsWataru Mizubayashi, AIST, Japan
P61 (Poster) - Investigation of Random Telegraph Noise Characteristics with Intentional Hot Carrier AgingHyeong-Sub Song, Chungnam National University, Republic of Korea
P62 (Poster) - Full Understanding of Hot Electrons and Hot/Cold Holes in the Degradation of p-channel Power LDMOS TransistorsAndrea Natale Tallarico, University of Bologna, Italy
P63 (Poster) - Front-plane and Back-plane Bias Temperature Instability of 22 nm Gate-last FDSOI MOSFETsYang Wang, State Key Laboratory of ASIC and System, Fudan University, China
P64 (Poster) - Comparative Study on the Energy Profile of NBTI-Related Defects in Si and Ferroelectric p-FinFETsLongda Zhou, Institute of Microelectronics of the Chinese Academy of Sciences, China
Wide-Bandgap Semiconductors - GaN
Session Chair Introduction: Sameh Kahlil
6B.1 - A Generalized Approach to Determine the Switching Lifetime of A GaN FETSandeep Bahl, Texas Instruments, United States
6B.2 - Charge Trapping and Stability of E-Mode p-gate GaN HEMTs Under Soft- and Hard- Switching ConditionsFabrizio Masin, UniPD, Italy
6B.3 - Trap Dynamics Model Explaining the RON Stress/Recovery Behavior in Carbon-Doped Power AlGaN/GaN MOS-HEMTsNicolò Zagni, University of Modena and Reggio Emilia, Italy
6B.4 - Demonstration of Bilayer Gate Insulator for Improved Reliability in GaN-on-Si Vertical TransistorsKalparupa Mukherjee, UniPD, Italy
6B.5 - Robust avalanche in GaN leading to record performance in Avalanche Photo DiodeDong Ji, Stanford University, USA
6B.6 - Failure Analysis of 100 nm AlGaN/GaN HEMTs Stressed under On- and Off-State StressTobias Kemmer, Fraunhofer IAF, Fraunhofer Institute for Applied Solid State Physics, Germany
P70 (Poster) - On the Root Cause of Dynamic ON Resistance Behavior in AlGaN/GaN HEMTsSayak Dutta Gupta, Indian Institute of Science, India
P71 (Poster) - Effects of Thermal Boundary Resistance on the Thermal Performance of GaN HEMT on DiamondAssaad El Helou, Southern Methodist University, United States
P78 (Poster) - Fast Neutron Irradiation Effects on Multiple Gallium Nitride (GaN) Device Reliability in Presence of Ambient VariationsLuis Soriano, University of Nevada, Las Vegas, United States
P79 (Poster) - Enhanced Threshold Voltage Stability in ZnO Thin-Film-Transistors by Excess Oxygen in Atomic Layer Deposited Al2O3Chadwin Young, University of Texas at Dallas, United States
P81 (Poster) - Substrate Bias Effect on Dynamic Characteristics of Monolithic Integration GaN Half-BridgeWen Yang, University of Central Florida, United States
P82 (Poster) - ESD Robustness of GaN-on-Si Power Devices under Substrate Biases by means of TLP/VFTLP TestsWen Yang, University of Central Florida, United States
P84 (Poster) - Reliability of 200mm E-mode GaN-on-Si Power HEMTsDavid Zhou, Innoscience Technology, China
Wide-Bandgap Semiconductors - SiC
Session Chair Introduction: Thomas Aichinger
3B.1 (Invited) - Ruggedness of SiC Devices Under Extreme ConditionsPeter Friedrichs, Infineon, Germany
5B.1 (Invited) - Defect Spectroscopy in SiC DevicesMichael Waltl, Institute for Microelectronics, TU Wien, Austria
5B.2 (Invited) - Challenges and Peculiarities in Developing New Standards for SiCDon Gajewski, Cree/Wolfspeed, United States
3B.2 - Physics of Degradation in SiC MOSFETs Stressed by Over-voltage and Over-current SwitchingJoseph P. Kozak, Virginia Polytechnic Institute and State University, United States
3B.3 - Non-Isothermal Simulations to Optimize SiC MOSFETs for Enhanced Short-Circuit RuggednessDongyoung Kim, SUNY Polytechnic Institute, United States
3B.4 - Gate-oxide reliability and failure-rate reduction of industrial SiC MOSFETsThomas Aichinger, Infineon Technologies Austria AG, Austria
3B.5 - Influence of high-voltage gate-oxide pulses on the BTI behavior of SiC MOSFETsSebastian Maaß, Infineon Technologies AG, Germany
5B.3 - Towards a Robust Approach to Threshold Voltage Characterization and High Temperature Gate Bias QualificationDaniel Habersat, US Army Research Laboratory, United States
5B.4 - Similarities and Differences of BTI in SiC and Si Power MOSFETsJudith Berens, KAI Kompetenzzentrum Automobil- und Industrieelektronik GmbH, Austria
5B.5 - Non-Intrusive Methodologies for Characterization of Bias Temperature Instability in SiC Power MOSFETsJose Ortiz Gonzalez, University of Warwick, United Kingdom
P65 (Poster) - Oxide Leakage Currents and E’ Centers in 4H-SiC MOSFETs with Barium PassivationJames P. Ashton, The Pennsylvania State University, United States
P68 (Poster) - Measurement of the Pre-Breakdown Characteristics in Silicon Carbide Power Devices by the Use of Radioactive Gamma SourcesMauro Ciappa, ETH Zurich, Integrated Systems Laboratory, Switzerland
P69 (Poster) - Constant-Gate-Charge Scaling for Increased Short-Circuit Withstand Time in SiC Power DevicesJames Cooper, Sonrisa Research, Inc. and Purdue University, United States
P72 (Poster) - Specific aspects regarding evaluation of power cycling tests with SiC devicesMartina Gerlach, Technische Universität Chemnitz, Germany
P74 (Poster) - Gate Oxide Reliability Studies of Commercial 1.2 kV SiC Power MOSFETsTianshi Liu, The Ohio State University, United States
P76 (Poster) - Thermomechanical behaviour of inverse diode in SiC MOSFETs under surge current stressShanmuganathan Palanisamy, Technische Universität Chemnitz, Germany
P77 (Poster) - Analysis of Transient HTRB Leakage in a SiC Field Ring TerminationRahul Potera, SemiQ Inc., United States
P83 (Poster) - Threshold Voltage Instability of Commercial 1.2 kV SiC Power MOSFETsSusanna Yu, The Ohio State University, United States
P80 (Poster) - Reliability and Robustness Performance of 1200 V SiC DMOSFETsSiddarth Sundaresan, GeneSiC Semiconductor, USA