IRPS

2018 IRPS Highlighted papers

IRPS 2018 has a very strong technical program of 39 invited speakers, 76 platform presentations, and 59 posters. The papers listed below were chosen by the technical program committee as particularly interesting to the reliablity community. Please click the links in the table for more details on each paper.

Paper IDSessionTitleAuthorsAffiliation
2A.1TransistorThe Physics of NBTI: What Do We Really Know?Jim StathisIBM
3A.2DielectricsTime-Dependent Dielectric Breakdown Statistics in SiO2 and HfO2 Dielectrics: Insights from a Multi-scale Modeling ApproachAndrea Padovani and Luca LarcherMDLSoft, Inc.
3C.1SystemsManaging electrical reliability in consumer systems for improved energy efficiency Vincent Huard, Souhir Mhira, Antony Barclais, Xavier Lecocq, Fabien Raugi, Marie Cantournet and Alain BravaixSTMicroelectronics and ISEN-REER
3C.6SystemsMachine Learning Based Dynamic Cause Maps for Condition Monitoring and Life Estimation Jay Sarkar, Cory Peterson, Amir SanayeiWestern Digital Corporation
3D.1ProductsResilient automotive products through process, temperature and aging compensation schemesSouhir Mhira, Vincent Huard, Deepak-kumar Arora, Philippe Flatresse and Alain BravaixSTMicroelectronics, SOITEC and ISEN-REER
3E.1ESD/Latch-UpDefect-Assisted Safe Operating Area Limits and High Current Failure in Graphene FETsNagothu Karmel Kranthi, Abhishek Mishra, Adil Meersha, Harsha Variar and Mayank ShrivastavaIndian Institute of Science
4A.1DielectricsMechanism of Soft and Hard Breakdown in Hexagonal Boron Nitride 2D DielectricsAlok Ranjan, Nagarajan Raghavan, Sean O' Shea, Sen Mei, Michel Bosman, Kalya Shubhakar and Kin Leong PeySingapore University of Technology and Design and A *STAR
4B.1Wide Band GapDegradation of Vertical GaN FETs Under Gate and Drain StressMaria Ruzzarin, Matteo Meneghini, Carlo De Santi, Min Sun, Tomas Palacios, Gaudenzio Meneghesso and Enrico ZanoniUniversity of Padova, Massachusetts Institutute of Technology
4C.1Soft ErrorScaling Trends and Bias Dependence of the Soft Error Rate of 16 nm and 7 nm FinFET SRAMsBalaji Narasimham, Saket Gupta, Dan Reed, J. K. Wang, Nick Hendrickson and Hasan TaufiqueBroadcom
4E.2Wide Band GapLifetime evaluation for Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT) under practical switching operationsAyanori Ikoshi, Masahiro Toki, Hiroto Yamagiwa, Daijiro Arisawa, Masahiro Hikita, Kazuki Suzuki, Manabu Yanagihara, Yasuhiro Uemoto, Kenichiro Tanaka and Tetsuzo UedaAutomotive and Industrial Systems Company, Panasonic Corporation
5B.62.5D/ 3D / packagingDevice Reliability for CMOS Image Sensors with Backside TSVsJeff Gambino, Hamid Soleimani, Irfan Rahim, Brandon Riebeek, Lieyi Sheng, Hung Truong, Gavin Hall, Rick Jerome and David PriceON Semiconductor
5C.2CircuitsAll-Digital PLL Frequency and Phase Noise Degradation Measurements Using Simple On-Chip Monitoring CircuitsGyusung Park, Bongjin Kim, Minsu Kim, Vijay Reddy and Chris H. KimUniversity of Minnesota, Texas Instruments
5C.3CircuitsDesign of Aging Aware 5 Gbps LVDS Transmitter for Automotive ApplicationsSrikanth jagannathan, Kumar Abhishek, Tarun Goyal, Nihaar Mahatme, Gayathri Bhagavatheeswaran and Ender YilmazNXP Semiconductors
6B.1Failure AnalysisSolving Critical Issues in 10nm Technology using Innovative Laser-based Fault Isolation and DFT Diagnosis TechniquesLesly Zaren Endrinal, Rakesh Kinger, Lavakumar Ranganathan and Amit ShethQualcomm Technologies, Inc.
6C.4PhotovoltaicsMechanical and chemical adhesion at the encapsulant interfaces during the lamination of photovoltaic modulesPhilippe Nivelle, Tom Borgers, Eszter Vöröshazi, Jef Poortmans, Jan D'Haen, Ward De Ceuninck and Michaël DaenenUniversity Hasselt
6D.5MemoryReliability Benefits of a Metallic Liner in Confined PCMWanki Kim, Yujun Xie, Yerin Kim, Takeshi Masuda, Sangbum Kim, Robert Bruce, Fabio Carta, Gloria Fraczak, Asit Ray, Koukou Suu, Chung Lam, Matt BrightSky, Judy Cha and Yu ZhuIBM, ULVAC Inc., Yale University
6E.1TestingLateral Profiling of HCI Induced Damage in Ultra-Scaled FinFET Devices with Id-Vd CharacteristicsMiaomiao Wang, Richard Southwick, James Stathis and Kangguo ChengIBM
6F.4Process IntegrationReliability Studies of a 10nm High-performance and Low-power CMOS Technology Featuring 3rd Generation FinFET and 5th Generation HK/MGAnisur Rahman, Javier Dacuna Santos, Pinakpani Nayak, Gerald S Leatherman and Stephen M RameyIntel Corporation